a 140 msps graphics digitizer preliminary specification 04/18/98 ad9884 rev. 0 analog devices, inc., 1998 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. one technolo gy wa y , p.o box 9106, norwood, ma 02062C9106, usa tel: 617/329C4700 fax: 617C326C8703 the ad9884 is a complete 8-bit 140msps, monolithic graphics digitizer optimized for digitizing rgb graphics signals from personal computers and workstations. its 140msps encode rate capability and full-power analog bandwidth of 300mhz supports display resolutions of up to 1280 x 1024 at 75hz with sufficient input bandwidth to accurately acquire and digitize each pixel. to minimize system cost and power dissipation, the ad9884 includes an internal +1.25v reference, pll to generate a pixel clock from hsync and vsync, and programmable gain and clamp control. the user provides only a +3.3v power supply, analog input, and hsync and vsync signals. three-state cmos outputs may be powered from 2.5v to 3.3v. the ad9884s on-chip pll generates a pixel clock from hsync and vsync inputs. pixel clock output frequencies range from 20C 140 mhz. pll clock jitter is 500ps p-p typical relative to the input reference. when an external coast signal is presented, the pll maintains its output frequency in the absence of hsync. a sampling phase adjustment is provided. data, hsync and clock output phase relationships are maintained. the pll can be disabled and an external clock input provided as the pixel clock. a clamp signal is generated internally or may be provided by the user through the clamp input pin. this device is fully programmable via a two wire serial bus. fabricated in an advanced cmos process, the ad9884 is provided in a space-saving 128-lead mqfp surf ace m ount plastic package and is specified over the 0c to +85c temperature range. features 140 msps maximum conversion rate 300 mhz analog bandwidth 0.5v to 1.0v analog input range 500ps p-p pll clock jitter 3.3v power supply 2.5v to 3.3v three-state cmos outputs demultiplexed output ports data clock output provided low power : 800mw typical internal pll generates clock from hsync serial bus interface fully programmable supports 2 pixels per clock mode applications rgb graphics processing lcd monitors and projectors plasma display panels scan converters clam p a/d r in r outa r outb 8 8 8 clam p a/d g in g outa g outb 8 8 8 clam p a/d b in b outa b outb 8 8 8 clock generator hsync vsync clamp ckinv ckext datack 2 pxck 2 even filt control ref sda scl a 0 pwrdn a 1 refout refin hsout preliminary technical data
ad9884 ad9884 preliminary technical information C 4/3/98 C2C rev. 00 critical characteristics (v dd = +3.3v, v d = +3.3v, encode = 140mhz) test ad9884ks parameter temp level min typical max units resolution 8 bits dc accuracy differential nonlinearity +25c full i vi 0.5 0.9 lsb lsb integral nonlinearity +25c full i vi 0.5 0.9 lsb lsb no missing codes full vi guaranteed gain tempco full v tbd ppm/c analog input input voltage range full v 0.5 1.0 v pCp input resistance +25c i tbd k w full vi tbd k w input capacitance +25c v 4 pf input bias current +25c full i vi tbd tbd m a m a analog bandwidth, full power +25c v 300 mhz reference output output voltage full vi +1.25 v temperature coefficient full v 50 ppm/c switching performance maximum conversion rate full vi 140 msps minimum conversion rate full iv 20 msps data to clock skew full vi tbd ns digital inputs input capacitance +25 c v3pf digital outputs logic "1" voltage full vi v d -0.1 v logic "0" voltage full vi 0.1 v output coding binary power supply v cc supply current full vi 180 ma v dd supply current full vi 60 ma total power dissipation full vi 800 mw powerdown supply current full vi tbd ma powerdown dissipation full vi tbd mw dynamic performance transient response +25c v tbd ns overvoltage recovery time +25c v 1.5 ns signalCtoCnoise ratio (snr) (without harmonics) f in = 19.7 mhz +25c full i v 45 45 db db signalCtoCnoise ratio (sinad) (with harmonics) f in = 19.7 mhz +25c full i v 43 43 db db effective number of bits f in = 19.7 mhz +25c i 6.8 bits crosstalk +25c full v v 60 55 dbc dbc preliminary technical data
ad9884 ordering guide model temperature range package option ad9884ks ad9884/pcb 0c to +85c +25c st-128 evaluation board explanation of test levels test level i 100% production tested. ii 100% production tested at +25c and sample tested at specified temperatures. iii sample tested only. iv parameter is guaranteed by design and characterization testing. v parameter is a typical value only. vi 100% production tested at +25c; guaranteed by design and characterization testing. absolute maximum ratings * v d ............................................................................................. +4 v v dd ........................................................................................... +4 v analog inputs .............................................................. v dd to 0.0 v vref in ...................................................................... v dd to 0.0 v digital inputs ............................................................... v dd to 0.0 v digital output current .......................................................... 20 ma operating temperature ............................................... 0c to +85 c storage temperature ............................................ C65c to +150 c maximum junction temperature .......................................... +175 c maximum case temperature ................................................ +150 c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress ratin g only and functional operation of the device at these or any other conditions outside of those indicated in the operation sections of this specification is not i mplied. exposure to absolute maximum ratings for extended periods may affect device reliability. preliminary technical data
ad9884 ad9884 preliminary technical information C 4/3/98 C4C rev. 00 top view (pin s dow n ) 1 38 39 65 64 102 128 103 0.011 (0.27) 0.009 (0.22) 0.007 (0.17) 0.551 (14.00) bsc 0.630 (16.00) bsc 0.866 (22.00) bsc 0.787 (20.00) bsc 0.020 (0.50) bsc seating plane 0.063 (1.60) typ 0.030 (0.75) 0.024 (0.60) 0.018 (0.45) 0.003 (0.08) max 0.006 (0.15) 0.002 (0.05) 0.057 (1.45) 0.053 (1.40) 0.018 (1.35) preliminary technical data
|
